Verilog vs. VHDL

One of the longest standing “arguments” between engineers in digital design has been the issue of which is best—Verilog or VHDL? For many years this was partly a geographical divide, with North America seeming to be mainly using Verilog and Europe going more for VHDL, although this was not universal by any means. In many cases, the European academic the community was trending toward VHDL with its easy applicability to system level design and the perception that Verilog was really more a “low level” design language. With the advent of SystemVerilog and the proliferation of design tools, these boundaries and arguments have largely subsided, and most engineers realize that they can use IP blocks from either language in most of the design tools. Of course, individuals will always have their own preferences; however, it is true to say that now it is genuinely possible to be language agnostic and use whichever language and tools the user prefers. More often than not, the choice will depend on 

three main factors: (a) the experience of the user (for example, they may have a background in a particular language); (b) the tools available (for example, some tool flows may simply work better with a particular language—SystemVerilog, for instance, may not be supported by the tools available), and (c) corporate decisions (where the company or institution has a preference for a specific language, and in turn this may mean that libraries must be in a specific format and language). For researchers, there is a plethora of information on all design languages available, with many example designs published on the web, making it relatively simple to use one or another of the main languages, and sometimes even a mixture of languages (using precompiled libraries, for example). Of course, this is also available to employees of companies and free material is now widely available from sources such as Open Cores (http://www.opencores.org), the Free Model Foundry (http://www.freemodelfoundry. com/) and the Open Hardware Repository at CERN (http://www.ohwr.org/).