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Graduate Memory Design Engineer at ARM Bangalore

 Hello Dear Readers, 

Currently, at ARM Noida vacancy for a Graduate Memory Design Engineer role.

With 125 Arm-powered products shipped every second, we'll be in a over a trillion smart devices by 2035. Your smartphone, award-winning VR gaming, the world's fastest supercomputer – our engineers are designing the advanced core processors leading the race towards a connected, autonomous, hyper-performance future. So, we promise you endless opportunities to experiment and go even further in hardware!

Here in PDG Memory Design Group, we at ARM, Enable outstanding IC implementation and physically optimized ARM CPU/GPU solutions on advanced process nodes (3nm/5nm/7nm/12nm/16nm). We craft/develop Memory compilers with high quality memory instances and Fast Cache Instance to meet a wide range of performance power and density applications. Typical platform contents include single, two and dual port static random-access memory (SRAM) compilers, which Arm calls SRAM or Register File (RF) compilers. Platforms typically also include a ROM compiler. Arm offers compilers with various architectures and optimization points, including High Density, High Speed and Ultra High Density.

Now, you have an opportunity to work on the next generation of processors that will appear in the most desirable products over the next 3 years. The Local design team is a good combination of very expert engineers and some of the most enthusiastic and hardworking graduates, coming from the best engineering schools. Collectively, the team is highly creative, collaborative, delivery orientated and committed.

Key accountabilities:

As Memory Design Engineers, we will work on developing memory compilers and memory Fast Cache instances for our next generation Arm Cores achieving outstanding PPA.

Education & qualifications:

We Prefer to graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree.

Desirable Skills and Experience:

  • You have some understanding of computer architecture and concepts.
  • We expect you to have basic understanding of CMOS Transistors, their behaviors.
  • We expect some basic understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits.
  • Understanding of Power versus Performance versus Area trade-offs in typical CMOS design.
  • You have an engineering demeanor and Passion for Circuit design.
  • Expected to have good interpersonal skills.

“Nice to have” skills:

  • You know basic scripting languages, e.g. Perl/TCL/Python.
  • Some Experience of working on Cadence or Synopsys flows.
  • Experience with Circuit Simulation and Optimization of standard cells.

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Comments

  1. Anonymous8 October 2022 at 02:23

    Hello bro I am from your Whatsapp group I got call for technical round thanks for your resume building tips works.

    ReplyDelete

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