Hello Dear Reader, Here in this post, I will give an idea about eight ideas that are responsible for today's evolution in computer architectures. Design for Moore’s Law The one constant for computer designers is rapid change, which is driven largely by Moore’s Law. It states that integrated circuit resources double every 18–24 months. Moore’s Law resulted from a 1965 prediction of such growth in IC capacity made by Gordon Moore, one of the founders of Intel. As computer designs can take years, the resources available per chip can easily double or quadruple between the start and finish of the project. Like a skeet shooter, computer architects must anticipate where the technology will be when the design finishes rather than design for where it starts. We use an “up and to the right” Moore’s Law graph to represent designing for rapid change. Use Abstraction to Simplify Design Both computer architects and programmers had to invent techniques to make themselves more productive, for ot...

 Hello Dear Reader, Here in this post, I will give an idea about how we can design microprocessors from the scratch as per the requirement. When designing a new microprocessor or microcontroller unit, there are a few general steps that can be followed to make the process flow more logically. These few steps can be further sub-divided into smaller tasks that can be tackled more easily. The general steps to designing a new microprocessor are: Determine the capabilities the new processor should have. Layout the datapath to handle the necessary capabilities. Define the machine code instruction format (ISA). Construct the necessary logic to control the datapath. Let's see each in details: Determine Machine Capabilities: Before you start to design a new processor element, it is important to first ask why you are designing it at all. What new thing will your processor do those existing processors cannot? Keep in mind that it is always less expensive to utilize an existing chip than to des...

Hello Dear Reader, Fig.1 Here given Fig.1 is one bit half adder in the lowest level of the abstration diagram is there as similarly we know their are two ways to designed one bit full adder either using two half adder and one or gate or designed using their separate boolean expression As shown in below Fig.2 and Fig.3. Fig.2     Fig.3 Here in below section i have provided verilog code at all the levels of the digital system design such as Behavioural Level, Data or RTL Level, Structural Level. Half-Adder: 1) Behavioural Level Verilog Code: module half_adder(a,b,c,s     );// behavioural model input a,b; output reg c,s; always@(a,b) begin if((a&&~b)||(~a&&b)) s=1; else s=0; if(a&&b) c=1; else c=0; end endmodule 2) RTL or Data Flow Level Verilog Code: module half_adder(a,b,c,s     );// Dataflow level model input a,b; output c,s; assign s=((a&&~b)||(~a&&b)); assign c=(a&&b);...

 Hello Dear Reader, Credits of this complete article go to my classmates Jimmy Patel, Abhishek Pandya, Sony Dudhe, Nikul Panchal they have given us a very short summary of the substructure of the CMOS device.   CMOS Fabrication: For less power dissipation requirement  CMOS technology  is used for implementing transistors. If we require a faster circuit then transistors are implemented over  IC using   BJT . Fabrication of  CMOS transistors  as IC’s can be done in three different methods. The N-well / P-well technology, where n-type diffusion is done over a p-type substrate or p-type diffusion is done over n-type substrate respectively. The  Twin well technology , where  NMOS  and PMOS transistor  is developed over the wafer by simultaneous diffusion over an epitaxial growth base, rather than a substrate. The silicon On the Insulator process, where rather than using silicon as the substrate an insulator material is used to...