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Design Verification Engineer, CPU Software Test Libraries at ARM Bangalore

  Hello Dear Readers, 

Currently, at ARM Bangalore vacancy for Design Verification Engineer, CPU Software Test Libraries role.

Job Description: 

Would you like to help us continue deploying billions of successful devices around the world, many of them enabling safety critical environments such as automotive or robotics? We are looking for outstanding engineers with different experience levels to be part of our STL (Software Test Library) development team within our CPU group in Bengaluru, India. As part of your responsibilities, you will develop safety-critical software (often written in assembly and C) tightly coupled with the internals of CPU design. You will also identify and build creative hardware features inside the CPU that improve the effectiveness of our solutions for segments where safety is of paramount importance without negatively affecting the power, performance and/or area of the core. This software executes opportunistically when the hardware is not fully utilized and performs continuous in-depth hardware diagnostics while the system is in operation. It identifies and notifies about functional misbehaviors derived from permanent faults triggered by natural hardware wear-out, or other uncontrollable factors before they may translate into catastrophic system failures with undesirable and even dangerous consequences. If you are passionate about understanding the interaction between hardware and software, have experience on some HDL language (Verilog or VHDL) and can program on assembly and/or C, this could be your great opportunity! We work on a multi-cultural and multi-disciplinary environment that will motivate you to further improve your skills and also contribute and get deep knowledge on Arm CPU designs and development processes. STL is a fundamental piece of the development strategy for sectors with strong safety requirements like automotive, health or robotics. Working with us, you are going to deeply influence and interact on the development of successful solutions for this sectors in conjunction with our multidisciplinary team.

Responsibilities: 

As design engineer on STLs you will join our team and share the following responsibilities: 

  • STL design specifications, verification plan and the safety documents as per ISO26262 and IEC61508 in collaboration with the team. 
  • Help building diagnostic software to target CPU sub-units like ALU, pre-fetchers, branch predictors, cache controllers, memory systems, etc. 
  • Explore hardware design features that will improve STL efficiency on ongoing and future CPU developments. You will also interact with the rest of the designers to implement them with minimum impact on area, performance and power.
  • Ensure STLs meet the specifications and work accurately on different CPU configurations. 
  • Contribute on the generation of the safety analysis of the STLs. 

Education & Qualifications:

You should ideally have a good university degree (or equivalent) in Computer Science or Electronic Engineering. Other science degrees would be considered with meaningful working experience. 

Required Skills & Experience: 

  • Creative open-minded attitude with strong motivation to resolve challenging technical problems. 
  • Excellent team working skills and ability to understand and communicate technical concepts. 
  • Willingness to explore, learn, improve and to go above and beyond. 
  • Understanding of the fundamentals of computer architecture and micro-architecture. 
  • Familiar with C language and assembly language preferably Arm ISA. 
  • Familiarity with RTL design and verification using HDL languages like Verilog, SystemVerilog or VHDL. 
  • Good working knowledge of scripting languages like python.

'Nice To Have' Skills & Experience: 

  • Previous experience developing Software Built-In Self-Test is valued. 
  • Exposure to debugging netlist/gate level simulation. 
  • General understanding of RTOS (e.g. ThreadX, RTX). 
  • Exposure to MISRA-C 2012 standard. 
  • Experience in fault injections tools and methodologies (e.g Z01X ) 
  • Exposure to ISO26262 and/or IEC61508 functional safety standards and associated certification.



 

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