Skip to main content

Internship at AMD Bangalore

Hello Dear Readers,

Currently, at AMD Bangalore vacancy for an Intern role.

Job Description:

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

Role: 

We are seeking a highly skilled Verification engineer for memory subsystems in GFX IP. In this role, he/she would be responsible for verification closure of one of memory subsystem block

Meeting the demands of the constantly evolving project schedule, the successful candidate will be a member of the GFX IP team responsible for developing and delivering IP to various BUs. He/she will demonstrate passion toward design, design verification, be a teammate, a problem solver with independence, creativity and interpersonal skills.

Responsibilities:

  • Verification engineer driving one of memory sub system blocks verification
  • Working with architects and design leads and driving quality test plans
  • Developing verification infrastructure and improvements
  • Working with power architects and defining test patterns to able to build required power profile
  • Driving DV closure to meet schedules with quality
  • Mentoring Junior team on these blocks
  • Helping management with risk assessment on features and schedules
  • Working closely with memory sub-system DV lead for overall improved methodology of sub-system verification (including blocks).
  • Working with memory sub-system DV lead to identify potential areas of formal verification

Requirements:

  • BS +2 years or MS +1 years’ work experience preferred.
  • Experience with advanced verification methodologies and languages like UVM, system Verilog.
  • Scripting Python/Perl
  • Formal property based verification is a added plus.
  • Familiarity with all Design areas and tools and confirmed understanding of design/technology interactions
  • Good understanding of memory hierarchy, caches, address translations schemes.
  • Good understanding of general dram technologies and address translation schemes
  • Familiarity with GFX pipeline and GPU design is plus
  • Familiarity with Computer organization/architecture.
  • Strong analytical/problem solving skills and pronounced attention to details.
  • Must be a self-starter, and able to independently drive tasks to completion.
  • Good teamwork and communications skills are required
Labels:

Comments

  1. Anonymous25 November 2022 at 22:58

    It's contract job only they are never convert full time

    ReplyDelete

Post a Comment

Popular posts from this blog

Design Engineer at Infineon Bangalore

  Hello Dear Readers, Currently at Infineon Bangalore vacancy for the Design Engineer role. Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency power conversion for applications using GaN devices; In your new role you will: Design analog and mixed-signal modules  in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency power conversion for applications using GaN devices; Design and verify pre-silicon analog/mixed-signal integrated circuit blocks, including incorporating features for testing and quality assurance, and providing support for top-level integration; Assist in defining the requirements  for analog and mixed-signal blocks,aligning them with IP Module architecture, and ensuring compliance with requirements through documentation; Estimate effort and planning design work packages to meet project milestones; Provide essential support to physical design ...
1 comment
Read more

Engineer II - Analog Design Engineering at Microchip

Hello Dear Readers,   Currently at Microchip  vacancy for Engineer II - Analog Design Engineering role. Job Description: The Mixed Signal Development Group is responsible for delivering analog, digital and mixed-signal IP to divisions within Microchip. We work with leading edge CMOS processes to produce analog integrated circuits for wireline applications. From 112Gb/s+ SERDES to high-speed FEC engines, we enable technology that allows Microchip’s products to interface to the outside world.  Job Descriptions: As a member of the Mixed-Signal Development Group, the candidate will be supervised by a team leader/manager, and be engaged in the design of SERDES/DSP blocks, and other high-speed Digital Signal Processing blocks. This will involve taking a design from initial concept to production form. Throughout you will be mentored and coached by experienced engineers and be exposed to Microchip's Best-In-Class engineering practices. Job Responsibilities: Ramping up o...
2 comments
Read more

Analog Design Engineer II at onsemi

Hello Dear Readers,   Currently at onsemi  vacancy for  Analog Design  Engineer II role. JOB DESCRIPTION: An analog design engineer is expected to quickly take an analog design block through all phases of the development process, including design, simulation, and supervision of the layout/verification processes and evaluation/debug of silicon samples. A Senior Analog IC Design Engineer will be responsible for individual block designs using CMOS process. That person will work with the latest Cadence analogue design tools (Virtuoso Composer, Verilog) Spectre and appropriate PC-based tools (MATLAB). The nature of the circuits is Mixed Signal involving blocks such as switched capacitor amplifiers, data converters, charge pumps, references, voltage buffers, IO circuits and digital building blocks. QUALIFICATIONS: Analog engineer is expected to have PhD (no experience) or master’s degree in field of Electrical Engineering/VLSI/Electronics with 0-2 years of experience and w...
1 comment
Read more