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FPGA Design & Validation Engineer at InnoPhase, Inc.

 Hello Dear Readers,

Currently, InnoPhase Bangalore has a vacancy for FPGA Design & Validation Engineer role.

We are a leader in ultra-low-power wireless connectivity solutions for IoT products. Our award-winning Talaria TWO™ WiFi+BLE platform enables entirely new categories of smart devices using a unique, programmable digital polar radio architecture. We unleash the full potential of battery-based, direct-to-cloud, artificially intelligent, and machine-learning products such as smart door locks, remote security cameras, connected sensors, AR/VR, voice-activated A/V, wearables, and other energy-critical wireless IoT applications for a variety of markets.

Our headquarters are in San Diego, California, with additional development centers in San Jose, CA, Kista, Sweden, and Bangalore, India.

InnoPhase Bangalore is looking for a FPGA Design and Validation Engineer to join a growing start up 
semiconductor development organization and to help drive excellence in our IOT products.

Responsibilities & Desired skills:

  • Experience in Xilinx Vivado tools, Xilinx FPGA and Xilinx boards, testing and debugging RTL in FPGA.
  • Knowledge on ARM based SoCs, Timing closure of Xilinx FPGAs, ILA Debugging, and CRO usage for testing.
  • Knowledge on basic protocols like SPI, I2C, UART.
  • Knowledge of Xilinx FPGA internal resources and its usage, as Knowledge of Xilinx Zynq block design is added advantage.
  • Experience in writing testbenches to test RTL functional simulation, with respect to working inside FPGA.
  • Experience in RTL design in Verilog and writing testbenches in Verilog, Knowledge in System Verilog is added advantage.
  • Knowledge on TCL scripting to automate Vivado tools execution process.
  • Knowledge in C and Python.
  • Validation Test plan development pre- and post-silicon

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